Balanced self-checking asynchronous logic for smart card applications

Delay-insensitive or unordered codes may be used to construct both robust asynchronous circuits and self-checking systems. The redundant nature of the coding scheme also provides the possibility of a balanced implementation, where the power dissipated is independent of the input data. We demonstrate how these characteristics may be exploited to construct smart card functions that are resistant to both sidechannel and fault injection attacks. We also describe how the removal of the clock secures a potential point of attack and enables additional fine-grain timing countermeasures to be introduced. Preliminary results are presented for a smart card test chip containing multiple implementations of a 16-bit micro-controller, a smart card UART and a Montgomery modular exponentiator. q 2003 Elsevier B.V. All rights reserved.